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Lesson 19

Optimizing ZVS Range: Clamp Capacitance & Dead-Time

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Hello! Welcome to the fourth lesson in our module on the Active Clamp Flyback converter.

In our last lesson, we took a deep dive into the resonant transitions that make Zero Voltage Switching possible. We saw the elegant "dance" between the switches, inductors, and capacitors that allows energy to be recycled and switching losses to be eliminated. You learned how the circuit achieves ZVS.

Today, we'll build directly on that by exploring the practical levers a designer can use to control this process. Our goal is to identify key design parameters affecting the ZVS range, such as clamp capacitance and dead-time. Understanding these parameters is essential for your goal of reviewing a design and spotting opportunities for optimization.

The Core Condition for ZVS

Before we look at the individual parameters, let's recall the fundamental requirement for achieving ZVS on the main switch. There must be enough energy in the transformer's inductance to completely discharge the capacitance at the switch node during the dead-time. Conceptually, this is:


Here, is the negative current flowing at the start of the transition, and is the total parasitic capacitance at the switch node. All the design parameters we'll discuss are ways to ensure this inequality holds true over the desired range of operating conditions (input voltage, output load).


Parameter 1: Dead-Time - The "When"

Dead-time is the short duration when both the main and auxiliary switches are turned off. It's the most direct, and often adjustable, parameter for controlling ZVS. In an active clamp flyback, there are two critical dead-time intervals:

  1. Main Switch OFF to Clamp Switch ON: This dead-time must be long enough for the primary current to charge the main switch's parasitic capacitance (C_oss) and raise the switch node voltage high enough to forward-bias the clamp switch's body diode. This transition is usually very fast.

  2. Clamp Switch OFF to Main Switch ON: This is the most critical dead-time for achieving ZVS. It must be precisely long enough for the negative valley current () to discharge the lumped switch node capacitance (C_lump) to zero.

The trade-offs are crucial:

  • Too Short: The switch node voltage won't reach zero before the main switch turns on, resulting in hard switching and significant power loss.
  • Too Long: After the voltage hits zero, the negative current will flow through the main switch's body diode. While this maintains the ZVS condition, body diodes have higher voltage drops and are less efficient than the MOSFET channel. Excessive conduction here leads to unnecessary losses. The timing needs to be just right.

This is why modern controllers often have adaptive dead-time control, sensing the switch node voltage to turn on the main switch at the optimal moment.

Flyback with Active Clamp: a suitable topology for Low ...

The paper 'Flyback with Active Clamp...' provides experimental results that highlight how dead-time is used in practice. This will connect the theory to a real-world application.

Read the last paragraph of the 'EXPERIMENTAL RESULTS' section. Find the sentence that begins 'ZVS is achieved at voltage higher than 80V...'. Notice the key phrase: '...dead times are adjusted to optimize the higher input voltages.' This confirms that dead-time is a tunable parameter used to define the ZVS operating range.


Parameter 2: Clamp Capacitance (C_clamp) - Shaping the Resonance

As we learned previously, the clamp capacitor (C_clamp) forms a resonant tank with the transformer's leakage inductance (L_leak). The value of this capacitor has a significant effect on the current waveforms and, consequently, the ZVS behavior, especially at high input voltages.

  • How it works: C_clamp and L_leak resonate when the clamp switch is on. The resonant frequency, , determines the shape and duration of the current that recharges the magnetizing inductance in the negative direction.
  • Impact of value:
    • A larger C_clamp creates a lower resonant frequency. This results in a slower, more sinusoidal current waveform. This can reduce the RMS value of the current, which in turn lowers conduction losses and improves efficiency, particularly at high input voltages.
    • A smaller C_clamp leads to a faster, sharper resonance.

The choice is a trade-off between efficiency, component size, and the desired ZVS characteristics.

Flyback with Active Clamp: a suitable topology for Low ...

Let's revisit the same paper, which provides an excellent analysis comparing two different values for the clamp capacitor. You'll see simulation and measurement results that clearly show its impact.

Read the text starting from 'The value of the clamp capacitance affects the current waveform...' through to the end of the paragraph containing Figure 8. Pay close attention to Figures 4, 6, and 7, which compare the operation with C_CLAMP = 100nF vs. 1000nF. Focus on how the larger capacitor creates a 'softer' diode current waveform.

For a design, the capacitance can be calculated to ensure the resonant period aligns with the operating duty cycle. The onsemi paper "High-Density AC-DC Power Supplies..." gives a design equation for this:

High-Density AC-DC Power Supplies using Active-Clamp ...

Let's look at a concrete design formula for selecting the clamp capacitor from the onsemi paper.

Find section 'A. Clamp Capacitor' and examine Equation 21. You don't need to memorize it, but recognize that its purpose is to size the capacitor so that the resonance period is half of the switch-on time at the lowest operating frequency.


Parameters 3 & 4: Magnetizing Inductance (L_mag) & Switching Frequency (f_sw) - Generating the Energy

To achieve ZVS, we need to generate that negative valley current (). The amount of current ripple, and therefore the depth of this valley, is primarily controlled by the magnetizing inductance and the switching frequency.

The fundamental inductor equation is . Rearranged, the current ripple is .

  • Magnetizing Inductance (L_mag): A lower L_mag will result in a larger current ripple () for the same on-time. This makes it easier to achieve the required negative valley current for ZVS, especially under light load conditions. However, a larger ripple current also means higher conduction losses throughout the circuit.
  • Switching Frequency (f_sw): As the switching frequency increases, the on-time (t_on) for a given duty cycle decreases. To maintain the same negative valley current, the inductance might need to be adjusted.

Modern controllers exploit this relationship by implementing frequency foldback or frequency modulation. As the load decreases or input voltage increases, the controller increases the switching frequency. This shortens the on-time, reducing the current ripple and keeping the negative valley current just sufficient for ZVS, thereby minimizing circulating current losses and maximizing efficiency.

High-Density AC-DC Power Supplies using Active-Clamp ...

The onsemi paper explains this optimization technique very clearly. It also shows how to calculate the required valley current based on the circuit's parasitic capacitance.

Please read the following three short sections: Section B. Valley Current needed to achieve ZVS: Focus on Equation 14 (C_lump) and Equation 15 (I_valley). This shows how the target valley current is determined by the total capacitance that needs to be discharged. Section C. Inductance Calculation: Look at Equation 16. Notice how I_valley is a direct input into the calculation for the magnetizing inductance, L_mag. Section E. Frequency Modulation: This section explicitly describes the strategy of increasing the frequency to keep the negative valley current at a minimum, optimizing performance.

Test your understanding!

You are reviewing an active clamp flyback design that works well at full load but loses ZVS (i.e., it starts hard-switching) at 20% load. The dead-time is already optimized. Which parameter is the most likely cause, and what change would help restore ZVS?

a) The clamp capacitance is too large.
b) The magnetizing inductance is too high.
c) The switching frequency is too high.

Show answer

The most likely cause is b) The magnetizing inductance is too high.

A high magnetizing inductance results in a small magnetizing current ripple. At full load, the overall current is high enough that the ripple still creates a sufficient negative valley current. However, at light load, the average current is much lower, and the small ripple is no longer sufficient to bring the current negative enough to discharge the switch node capacitance. A lower magnetizing inductance would increase the ripple, helping to restore ZVS at light loads (at the cost of higher conduction losses).


Conclusion

You now have a map of the key "control knobs" for an active clamp flyback converter. You've seen how they are not independent but are all interconnected in the service of achieving the core ZVS energy-balance equation.

Key Takeaways:

  • ZVS Range: This is the range of input voltages and output loads over which the converter can successfully maintain zero voltage switching.
  • Dead-Time: Provides the time window for the resonant transition. It must be long enough to discharge the switch node capacitance but not so long as to cause excessive body diode conduction losses.
  • Clamp Capacitance (C_clamp): Shapes the resonance with the leakage inductance, affecting current waveforms and efficiency. Larger values can soften the currents and improve high-voltage efficiency.
  • Magnetizing Inductance (L_mag) & Switching Frequency (f_sw): These parameters together determine how much negative current is generated. Lower inductance or lower frequency leads to more negative current, extending the ZVS range to lighter loads but increasing circulating currents.

In our next module, we will broaden our perspective by examining a completely different ZVS topology: the Phase-Shifted Full-Bridge (PSFB) converter. You'll see how a different arrangement of switches and a different control strategy can also be used to achieve the same goal of eliminating switching losses, giving you another important pattern to recognize in high-power designs.