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Formal/DV interview readiness in 12 weeks
·
Module 1
SVA Foundations & Advanced Semantics
1
SVA Implication Operators: Timing and Trade-offs
Explain the precise timing semantics and trade-offs of SVA implication operators (|-> and |=>).
2
SVA Repetition Operators for Complex Timing Patterns
Write SVA sequences using repetition operators (##, [*], [->], [=]) for complex timing patterns.
3
Choosing the Right Assertions
Strategically select between concurrent and immediate assertions based on design intent and simulation performance.
4
Assertions for Data Integrity Checks
Write assertions for data integrity checks such as data stability and no-corruption properties.
5
Asserting Liveness with Strong and Weak Operators
Write assertions for forward progress (liveness) properties using 'strong' and 'weak' operators.
6
Detecting Spurious Events and Illegal State Transitions
Write assertions for spurious event detection and illegal state transitions.
7
Multi-Clock Domain Assertions: Clock Resolution
Implement multi-clock domain assertions with correct clock resolution semantics.
8
Parameterized SVA for Reusable Verification IP
Write parameterized SVA properties for scalable and reusable verification IP.
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