External Interrupts: Edge-Triggered Events

1. The EXTI Peripheral: Bridging the Physical World and the CPU

While the NVIC manages interrupts within the CPU core, another peripheral is needed to detect events from the outside world and signal the NVIC. This is the External Interrupt/Event Controller (EXTI). It acts as a configurable bridge between the GPIO pins and the NVIC.

Before we touch any registers, let's look at a block diagram of the EXTI peripheral to build a mental model of the process.

As you can see, an input signal from a pin goes through several stages:

1. Edge Detect Circuit: This hardware block watches the pin's state and detects a change—a transition from low to high (rising edge) or high to low (falling edge).
2. Trigger Selection Registers (RTSR/FTSR): We configure these registers to tell the edge detector which event we care about (rising, falling, or both).
3. Interrupt Mask Register (IMR): This is a crucial gatekeeper. Even if a valid edge is detected, the interrupt signal will only be passed to the NVIC if the corresponding bit in this register is 'unmasked' (enabled).
4. Pending Register (PR): When a valid, unmasked edge is detected, a bit is set in this register to flag that an interrupt has occurred. We must clear this flag in our code after handling the interrupt.

2. Mapping a GPIO Pin to an EXTI Line

A common source of confusion for beginners is the relationship between GPIO pins and EXTI lines. On the STM32F103, there are 16 EXTI lines (EXTI0 to EXTI15). However, there are many more GPIO pins. The system uses a multiplexer to connect only one pin to each EXTI line at a time.

For example, pins PA0, PB0, PC0, PD0... all share the EXTI0 line. We must explicitly configure which one is the active source for EXTI0. The same applies to line 1 (PA1, PB1, PC1...), line 2, and so on.

This selection is handled by the Alternate Function I/O (AFIO) peripheral. Before configuring the EXTI, we must tell the AFIO which pin we want to use.

3. The 5 Steps of EXTI Configuration

Configuring an external interrupt on the STM32F1 series using bare-metal register access involves a clear, five-step process. We will configure an interrupt on pin PB1 for a button press. Assume the button connects the pin to GND when pressed, and we use the internal pull-up resistor.

1. Enable Clocks (RCC):

   • Enable the clock for the GPIO port being used (e.g., GPIOB).
   • Enable the clock for the AFIO peripheral. Both are in the RCC_APB2ENR register.

2. Configure GPIO Pin:

   • Set the pin (PB1) as a floating input or an input with pull-up/pull-down. Since our button connects to ground, we'll configure it as an input with an internal pull-up.

3. Configure AFIO Mapping:

   • Write to the appropriate AFIO_EXTICR register to select the GPIO port for the EXTI line. For pin PB1 (which uses EXTI1), we need to configure the EXTI1 field in AFIO->EXTICR[0] to 0001 (for Port B).

4. Configure EXTI Registers:

   • Unmask the interrupt in EXTI->IMR for the corresponding line (e.g., line 1).
   • Select the trigger edge in EXTI->RTSR or EXTI->FTSR. For a button connected to GND with a pull-up, the voltage goes from HIGH to LOW when pressed, so we configure a falling edge trigger in EXTI->FTSR.

5. Configure NVIC:

   • Enable the interrupt in the NVIC using the NVIC_EnableIRQ() function provided by CMSIS. The correct IRQ number for EXTI1 is EXTI1_IRQn.
   • Set the priority using NVIC_SetPriority(), keeping in mind the concepts from our last lesson (lower number = higher priority).

4. Hands-On Implementation

Now, let's put these steps into code. The following video and article from ControllersTech provide a complete, register-level guide. They use PA1 in their example, but the process is identical for PB1.

First, let's watch the video to see the whole process in action.

For a textual reference you can follow while coding, the companion article is excellent.

5. Writing the Interrupt Service Routine (ISR)

When the configured event (a falling edge on PB1) occurs, the CPU automatically pauses the main loop, saves its context, and jumps to a specific function called the Interrupt Service Routine (ISR). The name of this function is predefined in the startup file. For EXTI1, the ISR is named EXTI1_IRQHandler.

Inside the ISR, you perform the action you need, for example, toggling an LED. However, there is one absolutely critical step you must perform.

You must clear the interrupt's pending flag.

In the EXTI peripheral, when an interrupt is triggered, the corresponding bit in the Pending Register (EXTI->PR) is set by hardware. This is the bit that tells the NVIC there's a pending interrupt. If you do not clear this bit in your ISR, the NVIC will think the interrupt is still pending as soon as the ISR finishes. This will cause the CPU to get stuck in a loop, constantly re-entering the ISR and never returning to your main code.

To clear the flag, you write a '1' to the corresponding bit in EXTI->PR.

Let's see how this is done in the video, which also includes a fantastic real-world debugging example of what happens when you forget to clear the flag correctly.

Your Turn: Putting It All Together

Now it's your turn to implement this. Create a new project in STM32CubeIDE.

1. Create a function void button_interrupt_config(void).
2. Inside this function, implement the 5 configuration steps for pin PB1 using direct register access (RCC->..., GPIOB->..., AFIO->..., EXTI->..., NVIC_...).
3. Also configure the onboard LED pin (PC13) as a push-pull output.
4. Implement the EXTI1_IRQHandler(void) function. Inside it, toggle the LED on PC13 and immediately clear the pending flag for EXTI line 1.
5. In main(), call your configuration function, and then have an empty while(1) loop.

Compile, flash, and run the code. When you press the button, the LED should toggle. The CPU is now free to do other tasks (or sit idle in the empty while loop) and will only spend cycles on the button when it's actually pressed.

Conclusion

Congratulations! You have successfully implemented a hardware interrupt, a cornerstone of modern embedded programming. You've moved beyond inefficient polling and created a truly event-driven system.

Key Takeaways:

• The EXTI peripheral detects edge transitions on GPIO pins and signals the NVIC.
• The AFIO peripheral is used on STM32F1 devices to map a specific GPIO pin (e.g., PB1) to its corresponding EXTI line (e.g., EXTI1).
• Configuration is a 5-step process: Enable clocks (GPIO, AFIO), configure GPIO mode, configure AFIO mapping, configure EXTI (mask, trigger), and configure NVIC (enable, priority).
• Inside the ISR (e.g., EXTI1_IRQHandler), it is absolutely mandatory to clear the pending flag in the EXTI->PR register to prevent the CPU from getting stuck in an interrupt loop.

Preview of the Next Lesson:
Our current interrupt toggles an LED, but it doesn't handle the "bouncing" of the mechanical button. If you press the button slowly, you might see the LED flicker. In the next lesson, we will focus on writing a safe and efficient ISR, including a robust software debouncing algorithm that works correctly within an interrupt context. We will then assemble all the pieces from this module into a final project: controlling an LED's state using a debounced button press via an interrupt.