ARM Memory Map Architecture

1. The Big Picture: A Unified Address Space

From the CPU's perspective, the world is a simple, linear sequence of addresses. On a 32-bit ARM Cortex-M processor, this means the CPU can address 2³² bytes, creating a 4 Gigabyte (4GB) address space. Every component—internal flash, internal RAM, GPIO ports, timers, and even the CPU's own control registers—is assigned a unique address range within this single, unified space.

However, the logical view seen by the CPU is an abstraction. Physically, these components are distinct hardware blocks, some inside the microcontroller System-on-Chip (SoC) and some potentially external. The memory map is the architectural blueprint that defines how these physically separate components are mapped into the CPU's single address space.

2. The Key Regions of the Memory Map

While the specific layout is determined by the microcontroller vendor (like ST, NXP, or TI), ARM provides a standardized template for Cortex-M processors that divides the 4GB address space into several major regions. Let's explore the most important ones for a driver developer.

For our purposes, we will focus on three primary regions:

a. Code Region (Flash Memory)

• Address Range (Typical): Starts near the bottom, often at 0x00000000 or 0x08000000.
• Purpose: This region is mapped to non-volatile memory, almost always the on-chip Flash memory. It stores your executable program instructions. It also holds any read-only data, such as const variables and string literals.
• Key Feature: When you compile your project, the linker places the .text (code) and .rodata (read-only data) sections here. At the very beginning of this region is the vector table, which contains the initial stack pointer value and the address of the Reset Handler—the first code the CPU executes after a reset.

b. SRAM Region (RAM)

• Address Range (Typical): Often starts at 0x20000000.
• Purpose: This is mapped to the on-chip Static RAM (SRAM), which is volatile read/write memory. It's used for all of your runtime data.
• Key Contents:
  • The Stack: Used for function call frames, storing return addresses, and local variables. It typically grows downwards from the top of SRAM.
  • The Heap: Used for dynamic memory allocation (e.g., with malloc).
  • Global and Static Variables: The linker script places the .data (initialized non-zero variables) and .bss (zero-initialized variables) sections here.

c. Peripheral Region

• Address Range (Typical): Often starts at 0x40000000.
• Purpose: This is arguably the most important region for a driver developer. Addresses in this range do not map to conventional memory. Instead, they map directly to the control, status, and data registers of the hardware peripherals on the microcontroller.
• Mechanism: This is called Memory-Mapped I/O (MMIO). When your code writes a value to a specific address in this region, you are not storing data in RAM; you are directly configuring a hardware peripheral. For example, writing to a GPIO "Output Data Register" address changes the voltage on a physical pin.

const int CALIBRATION_VALUE = 100;
int g_sensor_reading = 0;

void process_data(int input) {
    char local_buffer[32];
    // ... function logic ...
}

3. From Architecture to Implementation: The Datasheet

The memory map provides the essential addresses you need to interact with the hardware. But where do you find this map? The definitive source is always the microcontroller's reference manual or datasheet.

Your experience with AUTOSAR involves analyzing ARXML files to understand system configuration. For a bare-metal or MCAL developer, the reference manual is the equivalent source of truth for the hardware's configuration. It provides the exact base addresses for every peripheral and the offset and bit-layout for every register within that peripheral.

This practical step of cross-referencing the architectural concept (memory map) with the vendor's documentation (datasheet) is a core skill for the role you are preparing for.

Interview Preparation

Understanding the memory map is a frequent topic in interviews for embedded roles. Be ready to articulate these concepts clearly.

• Question: "Could you describe the typical memory map of an ARM Cortex-M microcontroller and the purpose of its main regions?"

  • Answer: "An ARM Cortex-M has a 32-bit, 4GB unified address space. This space is partitioned into standard regions. The Code region, typically mapped to on-chip Flash, stores the program instructions and read-only data. The SRAM region is volatile memory used for runtime data, including the stack, heap, and global variables. The Peripheral region is crucial for driver development; it uses Memory-Mapped I/O, where addresses don't point to memory but to hardware registers of peripherals like GPIO, UART, and timers, allowing software to control the hardware by reading from and writing to these addresses."

• Question: "You need to toggle a pin using a GPIO peripheral. What's your process for finding the correct memory address to write to?"

  • Answer: "My first step is to consult the microcontroller's reference manual. First, I'd look at the main memory map to find the base address for the specific GPIO peripheral I need, for example, 'GPIOB'. Then, I'd go to the chapter detailing the GPIOB peripheral itself. That chapter will contain a register map, which lists all of the peripheral's registers—like the Mode Register (MODER) and Output Data Register (ODR)—along with their offsets from the peripheral's base address. The final address is the peripheral base address plus the register's offset."

• Question: "What is Memory-Mapped I/O, and what is its main advantage?"

  • Answer: "Memory-Mapped I/O is a method where hardware peripheral registers are mapped into the processor's main memory address space. The main advantage, especially in a RISC architecture like ARM, is that no special I/O instructions are needed. The processor can use its standard load and store instructions (LDR, STR) to interact with peripherals, just as it would with regular memory. This simplifies the instruction set and allows the full power of the C language, particularly pointers, to be used for hardware manipulation."

Conclusion

Today, we've put a map to the territory. You now understand the fundamental architecture that governs how software interacts with hardware at the lowest level. This knowledge is the bedrock upon which all driver development is built.

Key Takeaways:

• An ARM Cortex-M processor has a unified 4GB address space.
• This space is divided into regions: Code (Flash) for instructions, SRAM for runtime data, and Peripherals for hardware control.
• Interaction with peripherals happens via Memory-Mapped I/O (MMIO), where reads and writes to specific addresses manipulate hardware registers directly.
• The microcontroller reference manual is the authoritative source for the exact addresses and layouts for a specific chip.

Next Lesson Preview:

Now that we know where the peripheral registers are located in the memory map, our next lesson will focus on how to access them safely and efficiently from C code. We will cover the crucial volatile keyword and the use of pointers to read and write directly to these hardware addresses, bringing us one step closer to writing our first driver.