Welcome to the first lesson in our module on Finite State Machines (FSMs)! In the previous modules, you mastered the building blocks of digital systems: combinational logic for decision-making and sequential elements like registers for storing data. We saw how a register holds a value, which we can think of as the circuit's "state."
Today, we'll combine these concepts to explore FSMs, which are powerful models for designing complex sequential circuits. An FSM uses a register to store its current state and combinational logic to decide its next state and what outputs to produce. This lesson focuses on the two fundamental FSM architectures you'll encounter: the Mealy machine and the Moore machine. Your goal is to understand the crucial difference between them, which will be essential for designing and implementing them in Verilog later.
1. The Fundamental Difference: How Outputs are Generated
At the heart of any FSM is a block of combinational logic that calculates the next state and another block that generates the outputs. The distinction between Mealy and Moore machines comes down to what signals feed into the output logic.
- A Moore machine's output depends only on its current state.
- A Mealy machine's output depends on both its current state and its current inputs.
This might seem like a small detail, but it has significant implications for the machine's timing, behavior, and hardware structure.
Let's start with a video that introduces these concepts and illustrates their basic architectures using block diagrams.
Finite State Machine Explained | Mealy Machine and Moore Machine | What is State Diagram ?
This video from the ALL ABOUT ELECTRONICS channel clearly explains the core definitions and shows the structural differences between Mealy and Moore FSMs.
Please watch the following two segments: First, watch the explanation of the Mealy machine architecture. Notice how the external inputs feed into both the next-state logic and the output logic. Next, watch the breakdown of the Moore machine architecture. Pay close attention to how the external inputs only go to the next-state logic, and the output logic is only connected to the state registers.
2. Visualizing the Architectures
To solidify your understanding, let's review the architectures with some clear diagrams and text.
Mealy Machine and Moore Machine
This article provides concise descriptions and diagrams that reinforce what you just saw in the video.
Read the sections titled "Mealy Machine" and "Moore Machine". As you read, study the block diagrams (Figure 1 and Figure 2) and confirm your understanding of the signal paths for each machine type.
The image below provides a great side-by-side comparison of the two architectures, including how their structures are represented in state diagrams—a topic we'll cover in the next lesson.
Notice the key difference in the state diagrams at the bottom of the image:
- In the Moore diagram, the output (
1or0) is written inside the state circle. This visually represents that the output is a property of the state itself. - In the Mealy diagram, the output is written on the transition arrow, next to the input that causes it (e.g.,
0/1means "if input is 0, output is 1"). This shows the output depends on both the state transition and the input.
3. Timing Behavior: The Practical Consequence
So, why does this architectural difference matter so much in practice? It all comes down to timing.
Because a Moore machine's output is only a function of the state register, its output can only change when the state changes—that is, on a clock edge. This makes Moore outputs synchronous, stable, and glitch-free.
A Mealy machine, however, has a direct combinational path from the external inputs to the outputs. This means its outputs can change immediately in response to an input change, even between clock edges. This makes Mealy outputs asynchronous (or more accurately, combinational). This can be faster, but it also makes them susceptible to glitches if the inputs are not stable.
The following video provides an excellent demonstration of this timing difference using a real waveform simulation.
This video from Anas Salah Eddin provides a fantastic practical comparison, showing how the architectural difference translates into real-world timing behavior.
First, review the architectural differences in the block diagram explanations. The video uses a red line to emphasize the input-to-output path in the Mealy machine. Then, watch the waveform analysis. This is the most important part. Observe how the y_moore output changes only on the positive clock edge, a full cycle after the conditions are met. In contrast, see how the y_mealy output can assert itself much faster, as soon as the input x changes, and can also be shorter than a full clock cycle.
4. Summary of Differences and Trade-offs
Choosing between a Mealy and Moore machine is a classic engineering trade-off between speed, stability, and resource usage. Here is a summary of the key differences:
| Feature | Mealy Machine | Moore Machine |
|---|---|---|
| Output Dependency | Depends on present state and present input | Depends only on the present state |
| Output Timing | Asynchronous/Combinational (reacts immediately) | Synchronous (changes only on a clock edge) |
| Response Time | Faster response, within the same clock cycle | Slower response, delayed by one clock cycle |
| Glitch Potential | Outputs can glitch if inputs are not stable | Outputs are inherently stable and glitch-free |
| State Requirement | Generally requires fewer states for the same task | Often requires more states to produce outputs |
| State Diagram Notation | Output is written on the transition (e.g., in/out) |
Output is written inside the state |
When to Use Which?
-
Choose Moore when:
- Output stability is critical. You need clean, glitch-free outputs that are valid for an entire clock cycle.
- The outputs drive other synchronous elements, like registers.
- Simpler timing analysis is desired.
-
Choose Mealy when:
- You need the fastest possible reaction to an input.
- Minimizing the number of states is important (which can sometimes lead to simpler next-state logic).
- The outputs drive purely combinational logic where intermediate glitches are acceptable.
In modern design, a common hybrid approach is to use Mealy-style logic to generate outputs quickly but then immediately pass those outputs through a register. This gives you the fast logic of a Mealy machine while providing the stable, synchronous output of a Moore machine.
Conclusion
In this lesson, you've learned to distinguish between the two fundamental FSM architectures, Mealy and Moore. You are now equipped to analyze a state machine and identify its type based on its architecture, its state diagram, or its timing behavior.
Key Takeaways:
- The defining difference is the source of the outputs: Moore depends on state only, while Mealy depends on state and inputs.
- This structural difference leads to a timing difference: Moore outputs are synchronous and stable, while Mealy outputs are combinational and faster but can glitch.
- This is reflected in state diagrams, where Moore outputs are in the states and Mealy outputs are on the transitions.
In our next lesson, we will put this knowledge into practice. You will learn how to take a problem description, like "detect a sequence of bits," and translate it into a formal state diagram, which is the first and most critical step in designing any FSM.