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Lesson 2

Two's Complement Arithmetic

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Hello! Welcome back to our course on digital design.

In our last lesson, we covered the foundational number systems: decimal, binary, and hexadecimal. You learned how to convert between them and saw how they are specified in Verilog. This was all about representing positive numbers. But how do we handle negative values in a digital circuit?

Today, we'll answer that question. This lesson focuses on performing binary arithmetic operations using two's complement representation. This is the standard method computers and digital hardware use to represent and calculate with signed (positive and negative) integers. Understanding this is not just theoretical; it's fundamental to how Arithmetic Logic Units (ALUs) inside processors work and how you'll handle signed data in Verilog.

By the end of this lesson, you will be able to:

  • Represent negative numbers in binary using the two's complement method.
  • Perform addition and subtraction on signed binary numbers.
  • Identify when an arithmetic operation results in an error, a condition known as "overflow."

1. The Need for a Better System: Why Two's Complement?

Before we learn how two's complement works, it's crucial to understand why it's the universal standard. The most intuitive way to represent a negative number, called sign-magnitude, simply flips a "sign bit" (e.g., the most significant bit, MSB). However, this simple approach leads to two representations for zero (+0 and -0) and breaks standard binary addition.

To see why these simpler methods are flawed and why two's complement is superior, let's watch a fantastic conceptual explanation.

Twos complement: Negative numbers in binary

The video 'Twos complement: Negative numbers in binary' by Ben Eater masterfully illustrates the problems with more basic signed number systems and builds the case for why two's complement is so effective.

Watch from the beginning up to the 12:47 mark. Pay close attention to: Sign-Magnitude (0:00 - 4:17): Note how adding 5 + (-5) does not result in zero. One's Complement (4:17 - 9:46): See how this is an improvement, but the math is still 'off by one' and the 'negative zero' problem persists. Two's Complement (9:46 - 12:47): Observe how this system finally solves both problems: it has a single zero and the arithmetic just works correctly.

The key takeaway is that two's complement allows us to perform both addition and subtraction using the exact same hardware logic—an adder. This is a massive efficiency gain in circuit design. Subtracting a number B from A simply becomes adding the two's complement of B to A.


2. How to Create a Two's Complement Number

The method for finding the two's complement of a number (i.e., negating it) is a two-step process:

  1. Invert all the bits: Change every 0 to a 1 and every 1 to a 0. This is called the one's complement.
  2. Add 1 to the result.

Let's look at a visual representation of this process.

2's Complement Examples
This image shows the two-step process for finding a number's two's complement. On the left, a positive number is converted to its negative equivalent. On the right, a negative number is converted back to its positive equivalent using the same process.

For example, let's find the 8-bit two's complement representation of -42:

  1. Start with the positive decimal number: 42.
  2. Convert to 8-bit binary: 00101010.
  3. Invert the bits (one's complement): 11010101.
  4. Add 1:
      11010101
    +        1
    -----------
      11010110 
    

So, -42 in 8-bit two's complement is 11010110.

A useful shortcut to know: starting from the right (least significant bit), copy all bits until you copy your first 1. Then, invert all the bits to the left of that.


3. Binary Arithmetic with Two's Complement

Now let's put this into practice. The beauty of two's complement is that addition works the same way regardless of whether the numbers are positive or negative. You just add them as if they were unsigned, and the result is correct, provided it doesn't go out of range.

The following video provides excellent, step-by-step examples of different arithmetic scenarios. We will go through it in parts.

Addition and Subtraction using 2's Complement Arithmetic | 2s Complement Addition and Subtraction

The video 'Addition and Subtraction using 2's Complement Arithmetic' from the ALL ABOUT ELECTRONICS channel will walk us through the core operations. We'll use 5-bit numbers for these examples.

First, watch the brief introduction from 0:06 to 0:54 to get an overview of the process.

Case 1: Adding a Positive and a Negative Number

This is the most direct application, where subtraction is turned into addition.

  • A - B is the same as A + (-B).
  • We find the two's complement of B and add it to A.
  • Any carry-out bit from the most significant position is simply discarded.

Addition and Subtraction using 2's Complement Arithmetic | 2s Complement Addition and Subtraction

Now, let's watch the segments demonstrating the addition of numbers with opposite signs.

Watch these two segments: Positive larger magnitude (+13) + (-6) (5:17 - 7:29): Notice how the carry-out bit is ignored and the result is positive. Negative larger magnitude (-15) + (+9) (7:29 - 10:12): See how the result is a negative number, which is what we expect.

Case 2: Subtraction

Subtraction A - B is handled by converting it to A + (-B). This means we take the two's complement of the number being subtracted (the subtrahend) and add it to the other number (the minuend).

Addition and Subtraction using 2's Complement Arithmetic | 2s Complement Addition and Subtraction

Let's see how subtraction is explicitly handled.

Watch the segments on subtraction from 15:18 to 18:09. This demonstrates how 5 - 3 and 9 - (-6) are performed by converting to addition.

Practice Exercise 1:
Calculate 11 - 5 using 5-bit two's complement arithmetic.

Click for solution.
  1. Represent the numbers:

    • +11 in 5 bits is 01011.
    • +5 in 5 bits is 00101.
  2. Find the two's complement of +5 to get -5:

    • Invert 00101 -> 11010.
    • Add 1 -> 11011. So, -5 is 11011.
  3. Add 11 + (-5):

        01011  (11)
      + 11011  (-5)
      -----------
      1 00110  (carry is discarded)
    
  4. Result: 00110, which is +6 in decimal. The answer is correct.


4. The Problem of Overflow

What happens if the result of a calculation is too large (or too small) to be represented with the available number of bits? This is called overflow, and it produces an incorrect result.

For an n-bit signed number, the representable range is from to .

  • For 5 bits, the range is -16 to +15.
  • For 8 bits, the range is -128 to +127.

Overflow Rule: In two's complement, overflow can only happen when adding two numbers of the same sign.

  • Positive + Positive = Negative Result -> OVERFLOW
  • Negative + Negative = Positive Result -> OVERFLOW

Overflow is impossible when adding a positive and a negative number.

Let's see this in action.

Addition and Subtraction using 2's Complement Arithmetic | 2s Complement Addition and Subtraction

Let's return to the video to see what overflow looks like.

Watch these two segments on overflow: Adding two positives (+9) + (+7) (2:30 - 5:17): The expected result is +16, which is outside the 5-bit range. Notice that the sign bit of the result is 1 (negative), which is our clue for overflow. Adding two negatives (-8) + (-9) (13:04 - 15:28): The expected result is -17, also outside the range. The sign bit of the result is 0 (positive), again signaling overflow.

The concept of overflow is extremely important in hardware design. If you define a register in Verilog to be 8 bits wide but the result of an addition needs 9 bits, you will get an overflow and a silent, incorrect result unless you design your logic to detect it.

Practice Exercise 2:
Calculate 9 + 8 using 5-bit two's complement arithmetic and determine if overflow occurs.

Click for solution.
  1. Represent the numbers:

    • +9 in 5 bits is 01001.
    • +8 in 5 bits is 01000.
  2. Add them:

        01001  (+9)
      + 01000  (+8)
      -----------
        10001 
    
  3. Analyze the result:

    • We added two positive numbers (sign bits were both 0).
    • The result, 10001, has a sign bit of 1, meaning it's a negative number.
    • Overflow has occurred. The correct answer, +17, is outside the range of -16 to +15 that can be represented with 5 bits. The result 10001 would be incorrectly interpreted as -15.

Conclusion

Great job working through these concepts. You now understand not just how to perform binary arithmetic, but also the fundamental principles that make it efficient in hardware.

Here are the key takeaways from this lesson:

  • Two's complement is the standard for representing signed integers because it avoids the issues of other systems and allows a single adder circuit to perform both addition and subtraction.
  • To negate a number, you invert all bits and add 1.
  • Subtraction A - B is performed as A + (-B), where -B is the two's complement of B.
  • Overflow is an error that occurs when the result of an arithmetic operation exceeds the bit-width's representable range. It can be detected when adding two numbers of the same sign yields a result with the opposite sign.

In our next lesson, we'll shift gears from number representation to logic itself. We will explore Boolean algebra, the mathematical foundation upon which all digital logic circuits are built. This will equip us to start designing the simple circuits that perform these very arithmetic operations.